c - How can I write an SPI driver for Zynq 7000 ARM development board? -

i'm going write spi driver arm devlopment board. not used linux.

yesterday, read qspi driver xilinx provided , tried successfully. however, write own spi driver.

here questions:

1. what difference between qspi , spi on usage?
2. if write driver based on qspi, work?
3. if write driver scratch, basic procedure (read / write / initialize)?
4. and finally, why must spi send , receive @ same time?

thanks everybody.

i think may easier start last question first.

why must spi send , receive @ same time?

the easy answer is part of protocol. data shifted out on mosi line master slave, data in slave's buffer shifted master on miso line. allows hardware use single register in each device both data being sent , data being received. there diagram of process here:

http://en.wikipedia.org/wiki/serial_peripheral_interface_bus

the not easy answer spi not defined standard. there different types of implementation depending on devices using. there variant mosi , miso lines combined , used in bi-directional manner (3-wire spi). however, of implementations have dealt send , receive on 2 different lines , tends standard methodology.

what difference between qspi , spi on usage?

qspi or quad spi not adhere standard methodology , breaks concept of sending , receiving @ same time. utilizes 4 bi-directional i/o lines send , receive data , used memory applications (because faster spi). qspi not sending , receiving @ same time.

if write driver based on qspi, work?

certainly! have familiarize hardware using. again, spi different quad spi , can find hardware implementations make easy use qspi. example, zynq 7000 has qspi controller has lot of features simplify coding process. operate in "legacy mode" acts normal spi controller. on top of that, zynq 7000 has 2 other standard spi controllers not setup qspi. highly encourage read technical documentation here:

http://www.xilinx.com/support/documentation/user_guides/ug585-zynq-7000-trm.pdf

if write driver scratch, basic procedure?

that hardware dependent. did quick overview of hardware, detailing steps here take far long. however, technical manual device appears have great step-by-step instructions configuring , using both qspi , spi controllers. here example spi section:

17.3.1 start-up sequence

example: start-up sequence

1. reset controller: assert , de-assert ref , cpu_1x resets, refer section 17.4.1 resets.
2. program clocks: program spi_ref_clk, refer section 17.4.2 clocks.
3. tx/rx signal routing: refer section 17.5 i/o interfaces.
4. controller configuration: refer section 17.3.2 controller configuration.
5. interrupt configuration: configure isr handle interrupt conditions. simplest isr reads data rxfifo , writes content txfifo. ps interrupt controller described in chapter 7, interrupts. interrupt mechanism spi controller described in section 17.3.5 interrupt service routine.

6. start data transfers:

   master mode operation select: manual/auto start , ss, refer section 17.3.3 master mode data transfer.

   slave mode operation, refer section 17.3.4 slave mode data transfer.

i hope helps!