cpu - RAM / Addresses -

a machine has 4gb ram , processor 32 bits. large screen (monitor) needs atleast 2^21 addresses , machine supports 1 screen 1280x800 resolution equivalent needing 1,024,000 addresses. address space few other peripherals take @ least 2^21 addresses.

if want of 4gb of ram , peripheralds above including large screen monitor accessible, how bigger address bus need be?

i stuck on question, if can offer fantastic.

i forward hearing anyone.

disclaimer. made "c" in computer architecture class in both undergrad , grad school. take answer grain of salt.

for reference:

2^21 2mb 2^20 1mb 2^32 4gb == 4096 mb 

the large screen monitor needs 2mb. other 1280x800 monitor needs 1mb. peripheral address space 2mb that's 5mb total displays , devices.

so total address space 4096 mb + 5mb == 4101 mb

expanding out 4101 mb is:

4101 * 1024 * 1024 = 4300210176 

so valid address ranges 0..4300210175 (subtract 1 since "0" valid address)

4300210175 following in binary:

100000000010011111111111111111111 

that's address space 33 bits wide

assuming original address bus 32 bits, new 1 needs grow 1. bit address space plenty of space existing peripherals , room add more devices.

i suppose intuitively, if every new address line doubles address space of previous set, deducing "1" answer obvious.

either i'm late bloomer, or can see why didn't in architecture class.